dc.contributor.author | Poulakis, I | en |
dc.contributor.author | Economakos, G | en |
dc.contributor.author | Tsanakas, P | en |
dc.date.accessioned | 2014-03-01T02:48:58Z | |
dc.date.available | 2014-03-01T02:48:58Z | |
dc.date.issued | 2000 | en |
dc.identifier.uri | https://dspace.lib.ntua.gr/xmlui/handle/123456789/34175 | |
dc.subject | Design Space Exploration | en |
dc.subject | Digital Circuits | en |
dc.subject | Efficient Implementation | en |
dc.subject | Hardware Design | en |
dc.subject | High Level Synthesis | en |
dc.subject | Interaction Design | en |
dc.subject | System Level Design | en |
dc.subject | Register Transfer Level | en |
dc.title | Interaction in language based system level design using an advanced compiler generator environment | en |
heal.type | conferenceItem | en |
heal.identifier.primary | 10.1109/IWV.2000.844536 | en |
heal.identifier.secondary | http://dx.doi.org/10.1109/IWV.2000.844536 | en |
heal.publicationDate | 2000 | en |
heal.abstract | Computer-aided synthesis of digital circuits from behavioural level specifications offers an effective way to deal with the increasing complexity of digital hardware design. A high-level synthesis tool transforms an abstract algorithmic description into a detailed register transfer level implementation. Even though considerable research has taken place, regarding high-level synthesis, practical implementations are just emerging. This happens due to the fact | en |
heal.journalName | IEEE Computer Society Workshop on | en |
dc.identifier.doi | 10.1109/IWV.2000.844536 | en |
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