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Minimizing Completion Time for Loop Tiling with Computation and Communication Overlapping
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| dc.contributor.author | Goumas, G | en |
| dc.contributor.author | Sotiropoulos, A | en |
| dc.contributor.author | Koziris, N | en |
| dc.date.accessioned | 2014-03-01T02:49:04Z | |
| dc.date.available | 2014-03-01T02:49:04Z | |
| dc.date.issued | 2001 | en |
| dc.identifier.uri | https://dspace.lib.ntua.gr/xmlui/handle/123456789/34280 | |
| dc.subject | Loop Tiling | en |
| dc.title | Minimizing Completion Time for Loop Tiling with Computation and Communication Overlapping | en |
| heal.type | conferenceItem | en |
| heal.identifier.primary | 10.1109/IPDPS.2001.924976 | en |
| heal.identifier.secondary | http://dx.doi.org/10.1109/IPDPS.2001.924976 | en |
| heal.publicationDate | 2001 | en |
| heal.abstract | This paper proposes a new method for the problem of minimizing the execution time of nested for-loops using a tiling transformation. In our approach, we are interested not only in tile size and shape according to the required communication to computation ratio, but also in overall completion time. We select a time hyperplane to execute different tiles much more efficiently | en |
| heal.journalName | International Parallel and Distributed Processing Symposium/International Parallel Processing Symposium | en |
| dc.identifier.doi | 10.1109/IPDPS.2001.924976 | en |
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