RACE: A Software-Based Fault Tolerance Scheme for Systematically Transforming Ordinary Algorithms to Robust Algorithms

Yeh, C; Parhami, B; Varvarigos, E; Varvarigou, T

dc.contributor.author	Yeh, C	en
dc.contributor.author	Parhami, B	en
dc.contributor.author	Varvarigos, E	en
dc.contributor.author	Varvarigou, T	en
dc.date.accessioned	2014-03-01T02:49:06Z
dc.date.available	2014-03-01T02:49:06Z
dc.date.issued	2001	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/34294
dc.subject	Fault Tolerant	en
dc.subject	Parallel Computer	en
dc.title	RACE: A Software-Based Fault Tolerance Scheme for Systematically Transforming Ordinary Algorithms to Robust Algorithms	en
heal.type	conferenceItem	en
heal.identifier.primary	10.1109/IPDPS.2001.924968	en
heal.identifier.secondary	http://dx.doi.org/10.1109/IPDPS.2001.924968	en
heal.publicationDate	2001	en
heal.abstract	We propose the robust algorithm-configured emulation (RACE) scheme for efficient parallel computation and com- munication in the presence of faults. A wide variety of al- gorithms originally designed for fault-free meshes, tori, and k-ary n-cubes can be transformed to corresponding robust algorithms through RACE. In particular, optimal robust al- gorithms can be derived for total exchange (TE) and as- cend/descend	en
heal.journalName	International Parallel and Distributed Processing Symposium/International Parallel Processing Symposium	en
dc.identifier.doi	10.1109/IPDPS.2001.924968	en