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Analysis of transconductances at all levels of inversion in deep submicron CMOS

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dc.contributor.author Bucher, M en
dc.contributor.author Kuzazis, D en
dc.contributor.author Krummenacher, F en
dc.contributor.author Binkley, D en
dc.contributor.author Foty, D en
dc.contributor.author Pupunanos, Y en
dc.date.accessioned 2014-03-01T02:49:12Z
dc.date.available 2014-03-01T02:49:12Z
dc.date.issued 2002 en
dc.identifier.uri https://dspace.lib.ntua.gr/xmlui/handle/123456789/34411
dc.subject.other Analog IC design en
dc.subject.other Analytical structure en
dc.subject.other Bias conditions en
dc.subject.other Channel length en
dc.subject.other CMOS technology en
dc.subject.other Deep submicron CMOS en
dc.subject.other In-depth analysis en
dc.subject.other Inversion coefficient en
dc.subject.other Mosfet model en
dc.subject.other Strong inversion en
dc.subject.other Weak inversions en
dc.subject.other CMOS integrated circuits en
dc.subject.other Design en
dc.subject.other MOSFET devices en
dc.subject.other Transconductance en
dc.title Analysis of transconductances at all levels of inversion in deep submicron CMOS en
heal.type conferenceItem en
heal.identifier.primary 10.1109/ICECS.2002.1046464 en
heal.identifier.secondary http://dx.doi.org/10.1109/ICECS.2002.1046464 en
heal.identifier.secondary 1046464 en
heal.publicationDate 2002 en
heal.abstract This paper presents an in-depth analysis of transconductances in CMOS for advanced analog IC design. Transconductances in a 0.25μm CMOS technology have been measured over a large range of geometries and bias conditions. Gate(g mg), source(gms),drain(gmd)and bulk(g mb) transconductances are consistently normalized and represented vs. inversion coefficient ( I C ). from very weak to moderate and strong inversion. The ideal transconductance behavior in particular in weak inversion is analyzed via the analytical structure of the EKV MOSFET model. The new EKV 3.0 MOSFET model shows excellent abilities to correctly represent transconductances at all levels of inversion and channel lengths. © 2002 IEEE. en
heal.journalName Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems en
dc.identifier.doi 10.1109/ICECS.2002.1046464 en
dc.identifier.volume 3 en
dc.identifier.spage 1183 en
dc.identifier.epage 1186 en


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