Novel systolic schemes for serial-parallel multiplication

Sideris, I; Anagnostopoulos, K; Kalivas, P; Pekmestzi, K

dc.contributor.author	Sideris, I	en
dc.contributor.author	Anagnostopoulos, K	en
dc.contributor.author	Kalivas, P	en
dc.contributor.author	Pekmestzi, K	en
dc.date.accessioned	2014-03-01T02:50:10Z
dc.date.available	2014-03-01T02:50:10Z
dc.date.issued	2005	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/34930
dc.relation.uri	http://www.scopus.com/inward/record.url?eid=2-s2.0-84863703976&partnerID=40&md5=dbefeab1872e32f3aacd757d281d9451	en
dc.subject.other	Continuous operation	en
dc.subject.other	Hardware complexity	en
dc.subject.other	Modified booth encoding	en
dc.subject.other	Systolic multipliers	en
dc.subject.other	Signal processing	en
dc.subject.other	Multiplying circuits	en
dc.title	Novel systolic schemes for serial-parallel multiplication	en
heal.type	conferenceItem	en
heal.publicationDate	2005	en
heal.abstract	In this paper two new schemes of systolic multipliers are proposed, one based on Modified Booth encoding and the other is based on the selection of one of the terms 0, X, 2X, 3X where x is the serial input of the multiplier. The proposed multipliers operate with 100% efficiency that is without zero words inserted between successive data. Systolisity and the continuous operation are achieved without an increase in hardware complexity. The proposed schemes are especially suited for long number multiplication.	en
heal.journalName	13th European Signal Processing Conference, EUSIPCO 2005	en
dc.identifier.spage	983	en
dc.identifier.epage	986	en