System-level process variability compensation on memory organizations of dynamic applications: a case study

Sanz, C; Prieto, M; Papanikolaou, A; Miranda, M; Catthoor, F

dc.contributor.author	Sanz, C	en
dc.contributor.author	Prieto, M	en
dc.contributor.author	Papanikolaou, A	en
dc.contributor.author	Miranda, M	en
dc.contributor.author	Catthoor, F	en
dc.date.accessioned	2014-03-01T02:50:16Z
dc.date.available	2014-03-01T02:50:16Z
dc.date.issued	2006	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/35019
dc.subject	Case Study	en
dc.subject	Embedded System	en
dc.subject	Energy Consumption	en
dc.subject	Time Constraint	en
dc.title	System-level process variability compensation on memory organizations of dynamic applications: a case study	en
heal.type	conferenceItem	en
heal.identifier.primary	10.1109/ISQED.2006.129	en
heal.identifier.secondary	http://dx.doi.org/10.1109/ISQED.2006.129	en
heal.publicationDate	2006	en
heal.abstract	Process variability and the dynamism of new applica- tions have a tremendous impact on both the performance and the energy consumption of memory organizations of embedded systems. In this paper, we explore the com- bination of code transformations at compilation time and architectural-level techniques to tackle both problems, in- troducing a new methodology to combine them in an in- tegrated	en
heal.journalName	International Symposium on Quality Electronic Design	en
dc.identifier.doi	10.1109/ISQED.2006.129	en