A framework for architecture-level exploration of 3-D FPGA platforms

Sidiropoulos, H; Siozios, K; Soudris, D

dc.contributor.author	Sidiropoulos, H	en
dc.contributor.author	Siozios, K	en
dc.contributor.author	Soudris, D	en
dc.date.accessioned	2014-03-01T02:52:49Z
dc.date.available	2014-03-01T02:52:49Z
dc.date.issued	2011	en
dc.identifier.issn	03029743	en
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/36095
dc.subject.other	Application domains	en
dc.subject.other	Chip stacking	en
dc.subject.other	Consumer electronics products	en
dc.subject.other	Interconnection structure	en
dc.subject.other	Performance improvements	en
dc.subject.other	Power savings	en
dc.subject.other	Consumer electronics	en
dc.subject.other	Field programmable gate arrays (FPGA)	en
dc.subject.other	Optimization	en
dc.subject.other	Systems analysis	en
dc.subject.other	Timing circuits	en
dc.subject.other	Three dimensional	en
dc.title	A framework for architecture-level exploration of 3-D FPGA platforms	en
heal.type	conferenceItem	en
heal.identifier.primary	10.1007/978-3-642-24154-3_30	en
heal.identifier.secondary	http://dx.doi.org/10.1007/978-3-642-24154-3_30	en
heal.publicationDate	2011	en
heal.abstract	Interconnection structures in FPGAs increasingly contribute more to the delay and power consumption. Three-dimensional (3-D) chip stacking is touted as the silver bullet technology that can keep Moore's momentum and fuel the next wave of consumer electronics products. However, the benefits of such a technology have not been sufficiently explored yet. This paper introduces a novel 3-D FPGA, where logic, memory and I/O resources are assigned to different layers. Experimental results prove the efficiency of our architecture for a wide range of application domains, since we achieve average performance improvement and power saving of 30% and 10%, respectively. © 2011 Springer-Verlag.	en
heal.journalName	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)	en
dc.identifier.doi	10.1007/978-3-642-24154-3_30	en
dc.identifier.volume	6951 LNCS	en
dc.identifier.spage	298	en
dc.identifier.epage	307	en