dc.contributor.author |
Ηλιάκης, Κωνσταντίνος
|
el |
dc.contributor.author |
Iliakis, Konstantinos
|
en |
dc.date.accessioned |
2017-07-18T07:11:06Z |
|
dc.date.available |
2017-07-18T07:11:06Z |
|
dc.date.issued |
2017-07-18 |
|
dc.identifier.uri |
https://dspace.lib.ntua.gr/xmlui/handle/123456789/45239 |
|
dc.identifier.uri |
http://dx.doi.org/10.26240/heal.ntua.14042 |
|
dc.rights |
Default License |
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dc.subject |
Συστήματα Υψηλών Επιδόσεων |
el |
dc.subject |
Παράλληλος Προγραμματισμός |
el |
dc.subject |
Συναρισιακός Προγραμματισμός |
el |
dc.subject |
Πολυπύρηνοι επεξεργαστές |
el |
dc.subject |
Τεχνική Διοχέτευσης Λογισμικού |
el |
dc.subject |
MapReduce |
en |
dc.subject |
Multi-processors |
en |
dc.subject |
Parallel Computing |
en |
dc.subject |
Software Pipeline |
en |
dc.subject |
Phoenix Library |
el |
dc.title |
Pipelined MapReduce: A Decoupled MapReduce RunTime for Shared-Memory Multi-Proccessors |
en |
dc.contributor.department |
Microprocessors and digital systems laboratory |
el |
heal.type |
bachelorThesis |
|
heal.classification |
Computer science |
en |
heal.classification |
High performance computing--Congresses |
en |
heal.classificationURI |
http://id.loc.gov/authorities/subjects/sh89003285 |
|
heal.classificationURI |
http://id.loc.gov/authorities/subjects/sh2008105591 |
|
heal.language |
el |
|
heal.language |
en |
|
heal.access |
free |
|
heal.recordProvider |
ntua |
el |
heal.publicationDate |
2017-03-13 |
|
heal.abstract |
Modern multi-processors embody up to hundreds of cores in a single chip, in an attempt to attain TFlops/sec performance. Many subtle programming frameworks
have emerged in order to facilitate the development of parallel, efficient and scalable applications. The MapReduce programming model, after having indisputably, demonstrated its usability and effectiveness in the area of Large-Scale Distributed Systems computation, has been adapted to the needs of shared-memory multi-core
and multi-processor systems. The scope of this thesis is to enhance the existing, traditional MapReduce Architecture, by decoupling Map from Combine into two separate phases. These independent phases are interleaved and executed in parallel. We argue that, interleaving Map and Combine computation, leads to more efficient hardware utilization and competent run-time improvements.
A high-performance, shared queue data structure has been introduced in order to pipeline intermediate data from Map to Combine phase and allow for concurrent execution. Furthermore, an Inter-thread communication aware thread-to-cpu binding policy has been designed to minimize data exchange overhead. The Pipelined Architecture is evaluated into two inherently diverse multi-core
systems and demonstrates execution speedup of up to 5.34X compared to a state-of-the art MapReduce Library, Phoenix++. Nevertheless, we observe that not
all type of workloads profit from our Pipelined Architecture and reason about the application characteristics that define its suitability to our Runtime. |
en |
heal.advisorName |
Ξύδης, Σωτήριος |
el |
heal.committeeMemberName |
Σούντρης, Δημήτριος |
el |
heal.committeeMemberName |
Κοζύρης, Νεκτάριος |
el |
heal.committeeMemberName |
Πεκμεστζή, Κιαμάλ |
el |
heal.academicPublisher |
Εθνικό Μετσόβιο Πολυτεχνείο. Σχολή Ηλεκτρολόγων Μηχανικών και Μηχανικών Υπολογιστών. Τομέας Τεχνολογίας Πληροφορικής και Υπολογιστών. Εργαστήριο Υπολογιστικών Συστημάτων |
el |
heal.academicPublisherID |
ntua |
|
heal.numberOfPages |
104 σ. |
el |
heal.fullTextAvailability |
true |
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