Application classification techniques’ design for interference
mitigation in multiprocessor systems

Vemmou, Marina

dc.contributor.author	Vemmou, Marina	en
dc.date.accessioned	2020-01-21T08:28:25Z
dc.date.available	2020-01-21T08:28:25Z
dc.identifier.uri	https://dspace.lib.ntua.gr/xmlui/handle/123456789/49684
dc.identifier.uri	http://dx.doi.org/10.26240/heal.ntua.17382
dc.rights	Default License
dc.subject	Interference	en
dc.subject	Application profiling	en
dc.subject	Application classification	en
dc.subject	Hardware performance counters	en
dc.subject	Machine learning	en
dc.title	Application classification techniques’ design for interference mitigation in multiprocessor systems	en
heal.type	bachelorThesis
heal.classification	Computer systems	en
heal.language	en
heal.access	free
heal.recordProvider	ntua	el
heal.publicationDate	2019-07-19
heal.abstract	Multiprocessors are the basic building block of all modern computing systems. De- spite the benefits yielded by the ability to execute applications concurrently, the rivalry between applications for the chip’s shared resources, such the Last Level Cache and the memory bandwidth, can be detrimental to performance. Especially in commercial cloud environments, the provider is obliged to abide by strict performance guarantees required by certain applications (Quality of Service goals), leading to the isolated execution of the latter in dedicated servers to avoid interference, and consequently to the system’s under- utilization. As a result, extensive research has been conducted on the problem of application in- terference. This diploma thesis focuses on predicting cases where interference might be present by utilizing exclusively data by low-level hardware performance counters gathered during isolated application execution. The main characteristic of our approach is that it does not require executing an application with co-runners to decide whether it will suffer from or create contention, making it ideal for cloud environments, where subjecting an application to artificial interference is prohibitive. Our final mechanisms consists of two machine learning base multiclass classifiers. Each classifier receives a s input a specific set of hardware performance counter values and classifies the application in regards to its ability to cause interference (noise) and its sensitivity to it. We also showcase how the labels we have assigned each application can then be utilized by an application scheduler in a datacenter, in order to maximize the performance of high-priority applications.	en
heal.advisorName	Γκούμας, Γεώργιος	el
heal.committeeMemberName	Γκούμας, Γεώργιος	el
heal.committeeMemberName	Κοζύρης, Νεκτάριος	el
heal.committeeMemberName	Παπασπύρου, Νικόλαος	el
heal.academicPublisher	Εθνικό Μετσόβιο Πολυτεχνείο. Σχολή Ηλεκτρολόγων Μηχανικών και Μηχανικών Υπολογιστών. Τομέας Τεχνολογίας Πληροφορικής και Υπολογιστών	el
heal.academicPublisherID	ntua
heal.numberOfPages	90 σ.
heal.fullTextAvailability	true