dc.contributor.author |
Tsikrikas, N |
en |
dc.contributor.author |
Drygiannakis, D |
en |
dc.contributor.author |
Patsis, GP |
en |
dc.contributor.author |
Raptis, I |
en |
dc.contributor.author |
Gerardino, A |
en |
dc.contributor.author |
Stavroulakis, S |
en |
dc.contributor.author |
Voyiatzis, E |
en |
dc.date.accessioned |
2014-03-01T01:26:54Z |
|
dc.date.available |
2014-03-01T01:26:54Z |
|
dc.date.issued |
2007 |
en |
dc.identifier.issn |
1071-1023 |
en |
dc.identifier.uri |
https://dspace.lib.ntua.gr/xmlui/handle/123456789/18269 |
|
dc.subject |
Electron Beam Lithography |
en |
dc.subject |
Pattern Matching |
en |
dc.subject.classification |
Engineering, Electrical & Electronic |
en |
dc.subject.classification |
Nanoscience & Nanotechnology |
en |
dc.subject.classification |
Physics, Applied |
en |
dc.subject.other |
Computer simulation |
en |
dc.subject.other |
Computer software |
en |
dc.subject.other |
Electron beam lithography |
en |
dc.subject.other |
Microprocessor chips |
en |
dc.subject.other |
Random processes |
en |
dc.subject.other |
Chip layouts |
en |
dc.subject.other |
Complex layouts |
en |
dc.subject.other |
Stochastic simulations |
en |
dc.subject.other |
Pattern matching |
en |
dc.title |
Pattern matching, simulation, and metrology of complex layouts fabricated by electron beam lithography |
en |
heal.type |
journalArticle |
en |
heal.identifier.primary |
10.1116/1.2798714 |
en |
heal.identifier.secondary |
http://dx.doi.org/10.1116/1.2798714 |
en |
heal.language |
English |
en |
heal.publicationDate |
2007 |
en |
heal.abstract |
Validation of design rules taking into account fine details such as line-edge roughness, and full chip layout simulation for design inconsistencies, before actual fabrication, are among the main objectives of current software assisted metrology tools. Line-edge roughness quantification should accompany critical dimension (CD) measurements since it could be a large fraction of the total CD budget. A detailed simulation and metrology approach of line-edge roughness quantification versus the length scales in a layout are presented in this work using a combination of electron beam simulation for the exposure part, and stochastic simulations for the modeling of resist film, postexposure bake, and resist dissolution. The method is applied also on a test layout with critical dimension of 200 nm and the resulted simulation and scanning electron microscopy images are compared with the aid of a pattern matching algorithm which enables the identification of the desired layout for metrology on a complex layout containing many printed features. (c) 2007 American Vacuum Society. |
en |
heal.publisher |
A V S AMER INST PHYSICS |
en |
heal.journalName |
Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures |
en |
dc.identifier.doi |
10.1116/1.2798714 |
en |
dc.identifier.isi |
ISI:000251611900107 |
en |
dc.identifier.volume |
25 |
en |
dc.identifier.issue |
6 |
en |
dc.identifier.spage |
2307 |
en |
dc.identifier.epage |
2311 |
en |