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Physical architectures for packet-switching network nodes based on nonlinear logic gates

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Physical architectures for packet-switching network nodes based on nonlinear logic gates

Teimoori, H; Apostolopoulos, D; Vlachos, K; Ware, C; Petrantonakis, D; Yiannopoulos, K; Stampoulidis, L; Avramopoulos, H; Erasme, D
URI: https://dspace.lib.ntua.gr/xmlui/handle/123456789/32357
Date: 2008

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