Μελέτη αναλογικής βαθμίδας ηλεκτρονικών συστημάτων αναγνωσης σε τεχνολογία CMOS

Abstract

Στο πλαίσιο της διπλωματικής αυτής εργασίας που έλαβε χώρα στο Εργαστήριο Οργανολογίας του ΕΚΕΦΕ Δημόκριτος, μελετήθηκε η σχεδίαση αναλογικών ολοκληρωμένων κυκλωμάτων. Για την πληρέστερη μελέτη του αντικειμένου αυτού επιλέχθηκε ανάλυση του μεικτού ολοκληρωμένου κυκλώματος P4DI(UMC CMOS 180nm,1.8V τεχνολογία). Πάνω σε αυτό έγιναν προσομοιώσεις με το πακέτο σχεδίασης ολοκληρωμένων κυκλωμάτων της Cadence και ελήφθησαν πειραματικές μετρήσεις. Τέλος ο συγγραφέας προσπάθησε να δομήσει την εργασία αυτή έτσι ώστε να διευκολύνει μελλοντικούς φοιτητές της ΣΕΜΦΕ στη μελέτη της αναλογικής σχεδίασης ολοκληρωμένων κυκλωμάτων, των ηλεκτρονικών ανάγνωσης αλλά και τη χρήση του σχεδιαστικού πακέτου της Cadence βήμα προς βήμα.

This work deals with analog integrated circuit design for detector readout frond end applications. A circuit named P4DI (Photon 4–dimensional Digital Information) is analyzed and realized using the modern CMOS integration technology and its critical performance parameters are discussed in detail. P4DI is a new generation of 2D imaging chips to be connected to a pixel sensor using the bump and flip chip technologies. It gives in digital format energy, time and position information for each recorded event. In pixel digitization and storage of the time and amplitude signal are performed. Readout electronics are the first circuits connected just after the detector in order to process the signals, so many times are referred as front-end electronics. As the produced signals from the detector are always analog, the first stages of readout electronics should be analog too. After the signal is processed through the analog chain, depending the application its targets digital cells are also added. The overall process of the input signal may include a simple amplification and filtering or more complicated functions like analog to digital conversion. The most challenging and demanding parts, the readout electronics are the first analog stages, which are connected just after the detector. The performance of the whole chain is depending mainly on the operation of these stages. This is the primary reason why this thesis is focused mainly to the analyses of the most significant parts of the analog chain, the charge amplifier and the shaper. For the implementation of the circuits UMC CMOS 180nm technology-1.8V technology is selected due to the low cost, high yield, small process variations and of course the high density of integration. This diploma thesis is organized as follows. In the first four chapters a brief reference in readout front ends is performed as well as general introductory microelectronics. The fifth chapter gives a simple example of VLSI from the designer’s point of view. In the sixth chapter, the analog parts of the mixed integrated circuit P4DI are analyzed and a general view of its operation is given. Chapter 7 focuses on simulations using Cadence’s IC designing tools. Several interesting results are given from the parametric analysis of the length of the first transistor; the parasitic capacitances generated parallel to the detector, the leakage current generated in the detector as well as the linearity of the circuit. The last chapter includes the customization of the PCB designed for the test of the ASIC and all the experimental results that could be excluded are show.