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A heterogeneous multicore system on chip with run-time reconfigurable virtual FPGA architecture

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A heterogeneous multicore system on chip with run-time reconfigurable virtual FPGA architecture

Hubner, M; Figuli, P; Girardey, R; Soudris, D; Siozios, K; Becker, J
URI: https://dspace.lib.ntua.gr/xmlui/handle/123456789/33025
Date: 2011

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